The present invention relates to semiconductor fabrication systems and, more specifically, to a system for identifying the sources of wafer defects and using this information to control the processes in a fabrication plant.
Semiconductor fabrication involves processing a piece of a semiconductor material (referred to as a wafer) to create electronic circuits such as transistors, resistors and inductors on the wafer. These circuits are formed by depositing material on the wafer, doping areas of the semiconductor with other elements and etching the wafer. These processes also create the connections between the circuits.
Although a wafer is relatively large (e.g., several inches in diameter), the circuits are quite small. For example, state of the art fabrication processes can produce a circuit having a feature size in the sub-micron range. As a result, the error tolerance of fabrication systems is very small. Consequently, even the slightest error in the fabrication process can cause a significant number of defects in the processed wafer.
The incentive to reduce the number of defects in the wafer production process is compounded by the cost of the fabrication plant (xe2x80x9cFABxe2x80x9d). The cost of building a state-of-the-art FAB typically exceeds one billion dollars. As a result, it is imperative that the FAB yield be as high as possible to maximize the return on this investment.
The need to increase the yield in the FAB has led to the development of a variety of tools that identify defects in a wafer. Some tools enable a FAB operator to visually inspect the wafer (or a representation of the wafer) to locate defects. Typical tools of this type include optical inspection systems and scanning electron microscopes (xe2x80x9cSEMsxe2x80x9d). Other tools provide defect information in the form of data. Several of these tools group the defect data into classes. Given that similar defects may be caused by similar sources, this technique allows a FAB operator to more easily identify certain sources of defects.
In sum, conventional FAB tools may provide a plethora of FAB defect information. However, many of these tools do little more than generate the information and leave it to the operator to sort, classify and interpret the data. Thus, a need exists for a FAB yield enhancement system that can interpret this data and provide it to an operator in manner that enables the operator to efficiently locate the sources of the defects.
The present invention provides an automated yield enhancement system that identifies sources of defects on wafers and uses this information to control the fabrication process. The system collects defect information from the tools in the FAB and produces a global set of defect classes. Throughout the fabrication process, the system continually updates and reclassifies the global classification based on the current and prior defect data. Using the defect classification information and other FAB data, the system automatically identifies the sources of the defects and refines the analysis procedures used by the FAB inspection and review tools. In addition, the system may use the defect information and other FAB data to automatically adjust the operation of the FAB process tools to prevent similar defects from being formed on subsequently produced wafers.
In the global classification scheme, each defect is classified according to its characteristics. Preferably, these characteristics bear on the source or the severity of the defect. In contrast with conventional systems, a system constructed according to the invention provides a single, global classification scheme for defect information that may originate from a variety of tools that may otherwise be unrelated.
The system stores the classification data and other information related to the defects in a defect database. This information may include classification identifiers, defect source candidates and parameters that represent a relative confidence level that the identified candidates are indeed the source of the defect. In addition, the system may store optical review data, SEM information and wafer defect maps that are associated with the defects.
As new defects are processed, the information for the defects may be compared with corresponding information in the defect database. These classifications are continually refined and updated based on the defect information and other inputs from the FAB such as parametric data generated by tests conducted on the wafer.
To identify the source of a defect, the system processes the classification data generated by the yield enhancement system and defect source data provided by FAB tool vendors. Once the potential source of a defect is identified, the system may use this information to modify the inspection and review plans for the optical inspection and review tools, the SEM inspection and review tools or any other inspection, review or metrology tools. In addition, when the source of the defect is associated with a process tool that may be controlled by the yield enhancement system, the system may automatically adjust the process tool to eliminate the defect in subsequently fabricated wafers.
By continually updating the defect information and the review tool procedures based on accumulated data, the system may identify the sources of the defects more accurately than conventional systems. Moreover, by integrating defect information from all of the FAB tools, the system may quickly identify the source of a defect and automatically correct the problem or enable the FAB operator to do so.